PIC18C452T-E/PT【PDF 27/279 页】IC MCU OTP 16KX16 A/D 44TQFP

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3886

23页 24页 25页 26页 [27页]28页 29页 30页 31页

PIC18CXX2

DS39026C-page 120

2001 Microchip Technology Inc.

REGISTER 14-3:

SSPCON2: MSSP CONTROL REGISTER2

R/W-0

GCEN

ACKSTAT

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

bit 7

bit 0

bit 7

GCEN: General Call Enable bit (In I2C Slave mode only)

= Enable interrupt when a general call address (0000h) is received in the SSPSR

= General call address disabled

bit 6

ACKSTAT: Acknowledge Status bit (In I2C Master mode only)

In Master Transmit mode:

= Acknowledge was not received from slave

= Acknowledge was received from slave

bit 5

ACKDT: Acknowledge Data bit (In I2C Master mode only)

In Master Receive mode:

Value that will be transmitted when the user initiates an Acknowledge sequence at the end of

a receive.

= Not Acknowledge

= Acknowledge

bit 4

ACKEN: Acknowledge Sequence Enable bit (In I2C Master mode only)

In Master Receive mode:

= Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit.

Automatically cleared by hardware.

= Acknowledge sequence idle

bit 3

RCEN: Receive Enable bit (In I2C Master mode only)

= Enables Receive mode for I2C

= Receive idle

bit 2

PEN: STOP Condition Enable bit (In I2C Master mode only)

SCK Release Control:

= Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware.

= STOP condition idle

bit 1

RSEN: Repeated START Condition Enabled bit (In I2C Master mode only)

= Initiate Repeated START condition on SDA and SCL pins.

Automatically cleared by hardware.

= Repeated START condition idle

bit 0

SEN: START Condition Enabled bit (In I2C Master mode only)

= Initiate START condition on SDA and SCL pins. Automatically cleared by hardware.

= START condition idle

Note:

For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I2C module is not in the Idle mode,

this bit may not be set (no spooling) and the SSPBUF may not be written (or writes

to the SSPBUF are disabled).

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR reset

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式